What’s new in protocol analysers

Technology strides forward in leaps and bounds, enabling engineers to design and build even more sophisticated devices to improve productivity and performance. To ensure that the development process is successful, they need to be aware of the latest trends in protocol analysis, and that’s where this article comes in

By Dilin Anand

Monday, May 06, 2013: Electronics engineers working with the latest technology understand that for successful product development, they need to ensure that every required step has been taken and completed precisely the way it was designed.

Protocol analysers are tools that optimise the engineers’ product development by passively monitoring data transmissions on the bus, thus allowing them to see any possible error in the communication between a host device and the product.

What’s fuelling their increased use
Even though most systems employ higher-level protocols, the simple fact is that any error can have a subtle effect on the overall device and system operating efficiencies. These seemingly minor errors can later on grow to cause competitive disadvantages for the product and the company which developed it.

Derek Fung, vice president- business, Total Phase, explains, “System designers will want to detect and correct all possible sources of low-level data errors so that their designs can operate with the highest level of system performance. They can optimise product development to its fullest capacity with a protocol analyser.”

Hundreds of new models of mobile devices have been released onto the market in the recent years. The rapid expansion of mobile phone technology, explosive growth in the number of mobile devices, and multiple standards for 2G, 3G and LTE also contribute to the growth of protocol analysis.

Stephen Hire, general manager of Aeroflex Asia–India, adds, “Protocol analysis is a crucial part of mobile phone development. LTE is driving many new combinations of technology, all of which need to be tested thoroughly in order to ensure good customer experience. India’s and China’s adoption of the TD-LTE variant, and likely future deployment of LTE FDD, also put the world’s two largest markets by subscriber numbers onto a different track from mature cell-phone markets.”

Combined functionality
In developing countries like India, where the average revenue per user (ARPU) is far lower than in other countries, firms have to look at new techniques for cost reduction in order to keep a healthy margin for the company’s growth. One way to do this is to get more value from their instruments, which is done by getting single units that can perform various kinds of testing.

Stephen explains, “India and China also have much lower ARPUs forcing the manufacturers to look for cost savings in R&D. This requires lower-cost protocol analysis tools that may be described as ‘one box per engineer’ as they combine protocol, functional and RF testing in a single unit to maximise return on test investment. The larger number of combinations of LTE and legacy cellular technologies also increases the amount of testing, further reinforcing the need for flexible cost-effective tools.”

“Protocol analysers are largely used to verify protocol compliance. So compliance to various standards is an important feature desired by engineers. Also, protocol analysers that can show the data just as it appears in the specifications will be of great help to engineers working on those protocols. Debugging the protocol layer issues requires a different set of skills. While combining protocol, functional and RF testing might work for some protocols, it may not be efficient while debugging serial data solutions like PCIe and SAS,” shares Prabhanjana Rao, regional sales manager-India and SE Asia, ANZ, Teledyne LeCroy Corporation.

For the last few years, there has been an increase in the use of oscilloscopes for protocol decoding of serial buses as well. Initially, these were used for protocol decoding of low-speed buses like I2C and SPI, but the protocol applications of scopes have now expanded to incorporate many more buses like CAN, LIN, MIL-STD-1553, SATA, USB 2.0, USB 3.0, and all generations of PCI Express. Since oscilloscopes are already used for physical-layer debug of serial buses, the protocol analysis capability adds value by having a single instrument that provides the capabilities of an oscilloscope and protocol analyser.

Sanchit Bhatia, digital applications specialist, Agilent Technologies, explains the various advantages of using oscilloscopes for protocol analysis: “First, this saves the bench space and investment in a separate protocol analyser for each serial bus. Second, using a single instrument saves time as time and effort associated with the learning curve for each protocol analyser is removed. Third, oscilloscope-based protocol analysers have an inherent and unique capability of displaying protocol decoding correlated with the physical-layer analogue waveform. This correlation helps to trace back serial problems to their root cause in the analogue waveform. Finally, oscilloscopes provide easy connectivity to serial buses through a variety of probing options and fixtures. There is no need for a standard port or special input/output port for connectivity.”

Better graphical user interface
Protocol analysers with graphical user interfaces (GUIs) are gaining popularity among engineers due to their ease of use. The improved GUIs allow the users to execute test setups very quickly, resulting in improved productivity.

“User interfaces for these tools are becoming more and more user-friendly in the way they display decoded data, and hence protocol intricacies can now be dealt easily even with basic knowledge of protocol. It makes the task of test engineers fast and easy, while still maintaining the accuracy of testing. Some tools also support automation scripts for testing and analysis, which further helps reduce efforts and improve accuracy,” explains Siddharth Patel, lead engineer-embedded software, EATON India Engineering Centre.

More intuitive GUIs also have the advantage of reducing the learning curve for an engineer, translating to more productivity on the whole.

“The embedded engineers are often required to monitor analogue and digital signals and some protocol analysis. Serial protocol analysis on digital channels enables viewing of analogue, digital and protocol analysis. To top it all, RTO’s intuitive user interface helps engineers to observe all these signals easily with drag and drop, gestures, etc,” explains Srinivasa Appalla, area manager, product support & applications, Test & Measurement, Rohde & Schwarz India.

Improved hardware
Design engineers do not want to be impacted by slow tools. Rather, they need tools that will move with their development speed as they iteratively test and debug their systems.

“One of the most valuable features of a protocol analyser is its ability to provide real-time feedback. Real-time feedback allows developers to capture, display and filter data instantly instead of waiting for the capture to download. With the data shown immediately on the screen and the engineer ready to perform interactive analysis with the captured data, the engineer’s efficiency level can increase as a tool that matches their development pace is utilised,” explains Fung.

Removing sluggishness while decoding helps improve the quality of work as well. Siddharth adds, “Instead of just software-based analysers, we now see more and more hardware-based protocol analysers with sophisticated PC user interface. Hardware analysers help in getting real-time stamp for frames and hence have very realistic picture of what is happening on the bus and when it is happening. With increasing buffer space on hardware and fast communication interface with PC software, these tools can capture a good amount of traffic continuously even with loaded bus.”

Hardware-based decoding features are also available on scopes based on protocol analysers and help them over-come speed limitations.
“Hardware-based decoding provides a virtual real-time update of the decode trace, and doesn’t degrade the scope’s waveform update rate (which can be up to 1,000,000 waveforms per second). This enhances the scope’s probability of capturing and displaying infrequent serial bus communication errors,” says Bhatia.

In addition to improving the computational throughput of CPUs in software-defined test systems, Moore’s law is driving enhancements in another type of computing device: the field-programmable gate array (FPGA). Essentially, FPGAs are pieces of hardware that you can reconfigure with software. These enable the engineers to reduce test time and perform tests not previously possible without custom hardware.

Satish Mohanram, technical marketing manager, National Instruments India, explains the benefits of FPGA-based encode and decode: “Instead of using software to encode signal information into a protocol-level signal (and vice versa), FPGAs can encode and decode data directly in hardware. This simplifies test system software because it needs to work with only data information, and it makes protocol-level communication possible where predefined test vectors alone are not suitable (for example, when quick decisions are needed based on protocol data). It might also be necessary to quickly transition from receiving to transmitting data on the same line. The test hardware must be able to detect and respond to this case.”

In a nutshell
Enhancing the productivity and the accuracy are important goals for any design house. Protocol analysers are well positioned to help you achieve these goals.

*This article was published in Electronics For You, South Asia’s most popular electronics magazine

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