Tuesday, June 17, 2014:
In April 2014, Anritsu Corporation launched new clock recovery options for the MP1800A signal quality analyser (SQA) as R&D BER (Bit-error-rate) testing solutions for high-speed interconnects up to 32.1 Gbit/s. The MP1800A SQA is a modular-type BERT composed of a pulse pattern generator (PPG), plus a high-input sensitivity error detector (ED). A jitter modulation source can also be installed in the SQA to generate various types of jitter, including SJ, RJ, BUJ, SSC, etc, for device jitter tolerance tests. It also supports BER measurements and jitter tolerance tests for SERDES, active optical cables (AOC), optical transceiver modules, etc, using just the all-in-one MP1800A SQA.
For further details: Ph: 09310666466, [email protected], www.anritsu.com
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Electronics Bazaar, South Asia’s No.1 Electronics B2B magazine